Power 6 pegged for 5GHz+
IBM clock ticking faster
By Martin Veitch: Friday 29 December 2006, 17:51
INTERESTING sleuthing over at news.com where Stephen Shankland has
been peering at plans for the International Solid State Circuits
Conference in February. The scoop: IBMÂ’s Power6 is now expected to
ship with over 5GHz clock speeds.
As Shankland has said, Power6 had been pegged in the 4-5GHz range
but documents now suggest numbers north of 5GHz. Of course, we all
know clock speeds are far from being the be-all and end-all of
processor performance but the Power architecture has taken plenty
of knocks in the past for not keeping up, most notably from Steve
Jobs. Way back in 2003, Jobs promised hard-core Apple folks that
the IBM chips would be at 3GHz within 12 months. The failure to hit
that spot is seen by some as a contributory factor to the eventual
Intel switch.
A peek at faster Power6, Cell chips
At a chip show, IBM to tout 5GHz-topping Power6 and
next-gen 6GHz Cell. Intel to detail a 4GHz, 80-core
prototype.
By Stephen Shankland
Staff Writer, CNET News.com
Published: December 29, 2006, 8:14 AM PST
Judging by details revealed in a chip conference agenda,
the clock frequency race isn't over yet.
IBM's Power6 processor will be able to exceed 5 gigahertz in a
high-performance mode, and the second-generation Cell Broadband
Engine processor from IBM, Sony and Toshiba will run at 6GHz,
according to the program for the International Solid State Circuits
Conference that begins February 11 in San Francisco.
Chipmakers have run into problems increasing chip clock
speed--essentially an electronic heartbeat that synchronizes
operations in a processor--because higher frequencies have led to
unmanageable power consumption and waste heat.
To compensate, Intel and Advanced Micro Devices have turned instead
to the addition of multiple processing cores on each slice of
silicon. That's effective when computers are juggling numerous
tasks at the same time, but increasing the clock speed means an
individual task can run faster.
The first-generation Cell Broadband Engine chip, co-developed by
IBM, Sony, and Toshiba, has just appeared in Sony's PlayStation 3
game console and can run at 4GHz. The second-generation chip will
run at 6GHz, according to the ISSCC program. In addition, the new
chip will have a dual power supply that increases memory
performance--a major bottleneck in computer designs today.
For servers, IBM has said its Power6 processor, due to ship in
servers in 2007, will run between 4GHz and 5GHz. But in the ISSCC
program, Big Blue said the chip's clock will tick at a rate "over
5GHz in high-performance applications." In addition, the chip
"consumes under 100 watts in power-sensitive applications," a power
range comparable to mainstream 95-watt AMD Opteron chips and
80-watt Intel Xeon chips.
Power6 has 700 million transistors and measures 341 square
millimeters, according to the program. The smaller that a chip's
surface area is, the more that can be carved out of a single
silicon wafer, reducing per-chip manufacturing costs and therefore
making a computer more competitive. Power6, like the
second-generation Cell, is built with a manufacturing process with
65-nanometer circuitry elements, letting more electronics be
squeezed onto a given surface area.
Intel isn't standing idly by, though. In September, Intel showed a
glimpse of a prototype chip with 80 cores that can perform a
trillion mathematical calculations per second. At ISSCC, the
company will shed more details on the design, including an updated
speed measurement of 1.28 trillion calculations per second.
The chip measures 275 square millimeters--smaller than the
303-square-millimeter area indicated in September--and runs at
4GHz, according to the program. The chip, which Intel describes as
a "network-on-chip architecture," has 100 million transistors and
dissipates 98 watts of waste heat. Intel called each core a tile
and said each has network switch features to route packets of
data.
"It was designed as a research tool to test interconnect strategies
for many-core processors," Intel spokeswoman Erica Fields said.
Research goals for the project included testing new chip design
methods and investigating "how to move terabytes of data rapidly
between cores on-chip and between the cores and memory." She added
that the prototype can't run conventional software for Intel
chips.